LA

Register Listing for LA

Register	Address
LA_IEN3	0xf0003000
LA_IEN2	0xf0003004
LA_IEN1	0xf0003008
LA_IEN0	0xf000300c
LA_OE3	0xf0003010
LA_OE2	0xf0003014
LA_OE1	0xf0003018
LA_OE0	0xf000301c
LA_IN3	0xf0003020
LA_IN2	0xf0003024
LA_IN1	0xf0003028
LA_IN0	0xf000302c
LA_OUT3	0xf0003030
LA_OUT2	0xf0003034
LA_OUT1	0xf0003038
LA_OUT0	0xf000303c

LA_IEN3

Address: 0xf0003000 + 0x0 = 0xf0003000

Bits 96-127 of LA_IEN. LA Input Enable

LA_IEN2

Address: 0xf0003000 + 0x4 = 0xf0003004

Bits 64-95 of LA_IEN.

LA_IEN1

Address: 0xf0003000 + 0x8 = 0xf0003008

Bits 32-63 of LA_IEN.

LA_IEN0

Address: 0xf0003000 + 0xc = 0xf000300c

Bits 0-31 of LA_IEN.

LA_OE3

Address: 0xf0003000 + 0x10 = 0xf0003010

Bits 96-127 of LA_OE. LA Output Enable

LA_OE2

Address: 0xf0003000 + 0x14 = 0xf0003014

Bits 64-95 of LA_OE.

LA_OE1

Address: 0xf0003000 + 0x18 = 0xf0003018

Bits 32-63 of LA_OE.

LA_OE0

Address: 0xf0003000 + 0x1c = 0xf000301c

Bits 0-31 of LA_OE.

LA_IN3

Address: 0xf0003000 + 0x20 = 0xf0003020

Bits 96-127 of LA_IN. LA Input(s) Status.

LA_IN2

Address: 0xf0003000 + 0x24 = 0xf0003024

Bits 64-95 of LA_IN.

LA_IN1

Address: 0xf0003000 + 0x28 = 0xf0003028

Bits 32-63 of LA_IN.

LA_IN0

Address: 0xf0003000 + 0x2c = 0xf000302c

Bits 0-31 of LA_IN.

LA_OUT3

Address: 0xf0003000 + 0x30 = 0xf0003030

Bits 96-127 of LA_OUT. LA Ouptut(s) Control.

LA_OUT2

Address: 0xf0003000 + 0x34 = 0xf0003034

Bits 64-95 of LA_OUT.

LA_OUT1

Address: 0xf0003000 + 0x38 = 0xf0003038

Bits 32-63 of LA_OUT.

LA_OUT0

Address: 0xf0003000 + 0x3c = 0xf000303c

Bits 0-31 of LA_OUT.